Broadcom Inc. announced on December 5, 2024, the availability of its 3.5D eXtreme Dimension System in Package (XDSiP™) platform technology. This innovation enables consumer AI customers to develop next-generation custom accelerators, known as XPUs.
The 3.5D XDSiP integrates over 6000 mm² of silicon and up to 12 high bandwidth memory (HBM) stacks in a single packaged device, designed to enable high-efficiency, low-power computing for AI at scale. Broadcom has achieved the industry's first Face-to-Face (F2F) 3.5D XPU, which directly connects the top metal layers of the top and bottom dies, improving interconnect density and power efficiency.
Broadcom's lead F2F 3.5D XPU integrates four compute dies, one I/O die, and six HBM modules, leveraging TSMC's advanced process nodes and 2.5D CoWoS® packaging technologies. With more than five 3.5D products currently in development, production shipments are slated to begin in February 2026, indicating a clear path to market for this advanced technology.
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