Arteris, Inc. announced the immediate availability of the latest generation of its Magillem Registers technology for SoC integration automation on February 25, 2025. This product enables design teams to automate the hardware/software integration process, aiming to reduce development time by 35% compared to in-house solutions.
Magillem Registers provides a comprehensive solution for register design and management, accurately automating the hardware/software interface (HSI) for chips and chiplets ranging from IoT devices to complex AI datacenter multi-die SoCs. It mitigates the risk of silicon failure by providing a unified specification and compilation flow and over 1,000 semantic and syntactic checks.
The latest release delivers significant advancements, including up to 3x faster performance compared to Magillem 5, enabling the compilation of millions of registers within minutes. It also offers a 5x increase in supported design size and broad support for industry standards, including IEEE 1685-2022 (IP-XACT) and SystemRDL 2.0, enhancing IP reuse and compatibility.
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